1. Field of the Invention
The present invention relates to a process of controlling a programmable controller (PC) for transferring data to and from processing units linked therewith.
2. Description of the Background Art
FIG. 6 is a block diagram illustrating a master station 1 containing a programmable controller 2, employing a conventional PC controlling process, and slave stations 3 and 13, comprising coding devices, readers and the like. Processing units 4 and 14 are provided in the slave stations 3 and 13, respectively, and may be in the master station 1 as well. A cable 5 links the master station 1 to its adjacent slave stations and links adjacent slave stations to each other. A sequence program memory 6 is used for storing a sequence program, a flag memory 7 for storing a variety of flags, and a system program memory 11 for storing a system program required to execute the sequence program. A data link instruction information area 8, e.g., a data link instruction information memory, is used for storing the contents of data link instructions for effecting data transfer between the programmable controller 2 and the processing units linked therewith, e.g., data link instruction information and addresses for storing flags that are set when the operation of each of these data link instructions are complete, e.g., operation completion flag addresses, as a set in order. A communication control data area 9 is used for temporarily storing together information concerned with each processing unit as communication control data, including the information stored in the data link instruction information area 8, for the purpose of communication control. The data link instruction information area 8 and the communication control data area 9 are provided in the system program memory 11.
FIG. 7 illustrates a sequence program for setting a flag M20 (not illustrated) provided for indicating the completion of all operations of a series of data link instructions executed for a multiple of processing units in the conventional programmable controller control method. In FIG. 7, steps S701 to S720 are steps for executing a series of the data link instructions and a series of operation completion flag addressing instructions for specifying flag addresses to be temporarily set when the respective operations of the series of data link instructions are complete. A communication command flag 701 is employed as a flag that is set when the series of ten data link instructions and the series of operation completion flag addressing instructions are executed.
At steps S721 to S730, flags M0 (702) to M9 (711) are set by the series of operation completion flag addressing instructions. These flags are automatically reset after they have been set and the sequence program is run once.
A set of instructions 734-743 for setting flags M10 (760) to M19 (769) are provided in correspondence with flags M0 (702) to M9 (711), and flags M10 (760) to M19 (769) remain set until flag RESET instructions, discussed later, are executed.
At step S731, a flag SET instruction 744, which specifies a flag address M20A and is executed when flags M10 (760) to M19 (769) are all set, sets flag M20 (not illustrated) for indicating that the operations of the entire series of data link instructions is complete.
Located at steps S732 (745) to S741 (754) are flag RESET instructions, which reset flags M10 (760) to M19 (769). These instructions are executed when the same conditions exist as those for the execution of step S731, i.e. flags M10 (760) to M19 (769) are all set.
FIG. 8 illustrates part of the memory contents of the link instruction information area 8 shown in FIG. 6. In FIG. 8, a first data link instruction 801 is composed of information included in the data link instructions that are employed for data transfer to and from a first processing unit 4 and are written in the sequence program, e.g., the processing unit number as a transfer source or destination, a memory address as a transfer source or destination, etc. An operation completion flag address 802, specified by the operation completion flag addressing instruction, is written subsequent to the data link instruction in the sequence program.
The data link instruction information 801 and the operation completion flag address 802 are employed as a set and comprise a "data link instruction-related information group" 821 used for data transfer to and from the first processing unit 4.
Several data link instruction-related information groups 821 to 830 are stored sequentially in the data link instruction information area 8, in correspondence with the data link instruction and operation completion flag addressing instructions written in the sequence program.
Although FIG. 7 illustrates the execution of a single data link instruction for each processing unit, multiple data link instructions for each unit may be executed. FIG. 9 illustrates a sequence program employing the conventional programmable PC process where several data link instructions (four in FIG. 9) are executed for the same processing unit 4.
In FIG. 9, flag 901 at step S901 is a communication command flag, stored in the flag memory 7, that is accompanied by a first data link instruction 902, executed when the communication command flag 901 is set. At step S902, an operation completion flag addressing instruction 902 specifies an address M30A for storing a flag M30 (911) that is set when the operation of the first data link instruction 902 is complete.
At step S903, a second data link instruction 903 is executed subsequent to the first data link instruction 902. The second data link instruction 903 is executed when flag M30 (911), stored at the address M30A specified at step S902, is set.
At step S904, an operation completion flag addressing instruction 907 specifies an address M31A for storing a flag M31 (912) that is set when the operation of data link instruction 903 is complete.
Third and fourth data link instructions 904 and 905, at steps S905 to S908 are instructions for performing operations similar to those effected by the second data link instruction 903 at steps S903 and S904.
At step S909, a flag SET instruction 910 specifies an address M50A and is executed when the operation of the fourth data link instruction 905 is complete at step S907. In this regard, a flag M33 (914) is set for setting a flag M50 (not illustrated) for indicating that the operations of the first data link instruction 902 to fourth data link instruction 905 for unit 4 are all complete.
The system operation will now be described. Referring to FIG. 7, when the communication command flag 701 stored in the flag memory 7 is set at step S701, the series of instructions 712 to 721 and 722 to 731, for effecting data transfer between the programmable controller 2 and a first of several processing units are executed.
When the operation of the data link instruction 712 for data transfer to or from the first processing unit 4 is completed at step S701 by the operation completion flag addressing instruction 722 at step S702, M0A is specified as a memory address for storing operation completion flag M0 (702), which is set as the sequence program is run once.
At steps S703 to S720, the operations of the instructions used for the second processing unit 14 through tenth processing unit (units 3-10 are not illustrated in FIG. 6) are performed in correspondence with those of the data instruction 712 and the operation completion flag addressing instruction 722, specifying address MOA, employed for the first processing unit 4 at steps S701 and S702.
When flag M0 (702), specified by operation completion flag addressing instruction 722 at step S702, is set at step S721, flag M10 (760) is set by FLAG SET instruction 734. This stores at address M10A the fact that flag M0 (702) has been set.
At steps S722 to S730, flags M11 (761) to M19 (769) related to the second processing unit 14 through the tenth processing unit are set in the same manner that flag M10 (760), related to the first processing unit 4, was set at step S721.
When all flags M10 (760) to M19 (769) have been set at step S731, FLAG SET instruction 744 is executed to set flag M20 (not illustrated). This stores the fact that the operation of the data link instruction 712 for transfer to or from the first processing unit 4 through the operation of the data link instruction 721 for data transfer to or from the last processing unit (not illustrated) are all complete.
FLAG RESET instruction M10 (745) to M19 (754) at steps S732 to S741 cause flags M10 (760) to M19 (769) to be reset.
Information set in the data link instruction information area 8, when the sequence program shown in FIG. 7 is executed, will now be described with reference to FIG. 8. When the communication command flag 701 is set at step S701 in FIG. 7 and the data link instruction 712 for data transfer to or from the first processing unit 4 is executed, the information included in the data link instruction 712 for data transfer to or from the first processing unit 4, e.g., a processing unit number as a transfer source or destination ("1" for the first unit in this case), the memory address as a transfer source or destination, etc., is written to the data link instruction information area 8 as data link instruction information 801 shown in FIG. 8.
When the operation completion flag addressing instruction M0 (722) is executed at step S702, M0A is employed as the address of flag M0 (702) and is written to the data link instruction information area 8 as the operation completion flag address 802 in FIG. 8.
At steps S703 to S720, the operation performed for the first processing unit 4 at steps S701 and S702 is effected in a similar manner for the second processing unit 14 to the tenth processing unit, and the data link instruction-related information 822 for the second processing unit 14 through the data link instruction-related information 830 for the tenth processing unit are written to the data link instruction information area 8. While the sequence program is run repeatedly, the information is written to the data link instruction information area 8 only once after the communication command flag 701 is set.
Data transfer between the programmable controller 2 and the first processing unit 4 through the tenth processing unit in accordance with the information stored in the data link instruction information area 8 will now be described.
Assuming that the instructions for the first processing unit 4 are being processed every time the sequence program is executed once, a control part (not illustrated) included in the second processing unit 14 checks the contents of the communication control data area and data link instruction information area 8. If the operation performed immediately beforehand for processing unit 4 is already compete and there is data link instruction-related information which can be started for processing unit 14, a start is effected. When an interrupt signal that occurs periodically at a predetermined period of time is generated, a data transfer is effected to and from processing unit 14 in accordance with the communication control data stored in the communication control data area 9. Further, the information related to the data link instruction for unit 4, which has already completed its operation and terminated the operation of holding the corresponding operation completion flag in the set state while the sequence program is executed once, is erased from the data link instruction information area 8. This process is applied correspondingly to each of the remaining processing units.
As mentioned above, operation completion flag addressing instructions 722 to 731, specifying the addresses of flags M0 to M9, must be written in the sequence program in correspondence with each of the data link instruction 712, for data transfer to or from the processing unit 4, through the data link instruction 721, for data transfer to or from the processing unit 10 (not illustrated). Instructions 722 to 731 are used to set flag M20 (not illustrated). Flag M20 indicates whether or not the operations of the data link instruction 712 for data transfer to or from the first processing unit 4 through the data link instruction 721 for data transfer to or from the tenth processing unit (not illustrated) are all complete. Moreover, since flags M0 (702) to M9 (711) specified by operation completion flag addressing instructions for flags M0 (722) to flags M9 (731) are only set as the sequence program is run once, flags M10 (760) to M19 (769) must be provided in correspondence with flags M0 (702) to M9 (711), and steps S721 to S730 are all required in order to store the fact that any one of the flags M0 (702) to M9 (711) has been set while the sequence program is running once. Furthermore, step S731, for setting flag M20 (not illustrated) when all flags M10 (760) to M19 (769) have been set, must be provided. Finally, a sequence program, for resetting flags M10 (760) to M19 (769) that previously have been set, must be provided; and, a sequence program, for resetting flags M10 (760) to M19 (769) at steps S732 to S741, must be written.
As previously discussed, FIG. 9 illustrates a sequence program for executing a plurality of data link instructions composed of a first data link instruction 902 to fourth data link instruction 905 for the same processing unit, wherein each subsequent data link instruction is allowed to be executed only after completion of the operation of the data link instruction currently being executed. Therefore, the sequence program must be written so that only when the operation completion flag of the data link instruction executed immediately beforehand is set, can the operation of the next data link instruction be started. As illustrated in FIG. 7, it is also necessary to program the operation completion flag addressing instructions Mn (where n is an integer) in correspondence with respective data link instructions l (where l is an integer).
With the known programmable controller controlling process made up as described above, the sequence program cannot be written easily. For example, when it is only desired to store into the operation completion flag addresses 722-731 the information indicating whether or not the operation of a multiple of instructions for effecting data transfer to and from the processing units linked with the programmable controller in the master station are all complete, an operation completion flag addressing instruction 722-731 for specifying the address for storing the operation completion flag for each of the multiple instructions must be written in the sequence program in addition to the multiple instructions 712-721. This additional effort is time consuming and inefficient.